1. Field of the Invention
This invention relates to a semiconductor device and its manufacturing method, and especially those using nitride III-V compound semiconductors such as gallium nitride (GaN).
2. Description of the Related Art
Nitride III-V compound semiconductors constraining GaN as the major component are direct transitional semiconductors having forbidden band widths ranging from 1.9 eV to 6.2 eV and enabling realization of light emitting devices theoretically capable of emitting light over a wide range from the visible spectrum to the ultraviolet. For these properties, semiconductor light emitting devices using GaN semiconductors have been placed under active developments. Additionally, GaN semiconductors have a large possibility as material of electron mobility devices. Saturation electron velocity of GaN is approximately 2.0xc3x97107 cm/s, which is larger than those of GaAs and SiC, and its breakdown electric field is as large as approximately 5xc3x97106 V/cm next to the intensity of diamond. For these natures, GaN semiconductors have been expected to be greatly hopeful as materials of high-frequency, high-power semiconductor devices.
For manufacturing transistor using such a GaN semiconductor, it is necessary to grow the GaN semiconductor by chemical vapor deposition (CVD) or molecular beam epitaxy (MBE), and a sapphire substrate is often used as the substrate therefor. However, although thermal conductivity of GaN at the room temperature is 1.3 W/cmK and larger than thermal conductivity 0.3 W/cmK of GaAs at the room temperature, thermal conductivity of sapphire at the room temperature is 0.4 W/cmK similarly to that of GaAs, and as small as approximately {fraction (1/12)} when compared with thermal conductivity 4.9 W/cmK of SiC at the room temperature. Therefore, it has been pointed out that a GaN field effect transistor (FET) for a high output power made by growing a GaN semiconductor on a sapphire substrate was especially bad in heat dissipation during operation and was liable to deteriorate in characteristics ((1) Inst. Phys. Conf. Ser. No. 142, 765 (1996)). Therefore, improvement of heat dissipation characteristics is indispensable to ensure a high output power of a GaN FET. On the other hand, for operating the GaN FET at a high frequency its source inductance has to be reduced.
As basic technologies for realizing GaAs FETs for higher operative frequencies and higher output power relying reduction of the source inductance, there have conventionally been techniques for thinning a GaAs substrate, and techniques for making a via hole in a GaAs substrate and making electric connection to the source from the bottom surface of the substrate through the via hole. These techniques are summarized below ((2) Fundamentals of GaAs Field Effect Transistors, Denshi Joho Tsushin Gakkai, 1992, p.207; (3) U.S. Pat. No. 4,015,278; (4) Int. Electron Device Meet., Tech. Dig., 676 (1981)).
For thinning a GaAs substrate, first conducted primary lapping using a granular abrasive material of SiC or alumina. Then, by using abrasive grains of a grain size of 1 xcexcm or less of CeO2, ZrO2, CrO2, or the like, the substrate is polished on a soft polisher such as synthetic resin or artificial leather to remove processing strain by lapping. As a result, the remainder depth of the processing strain is reduced to 10 xcexcm or less, but additional processing by wet etching may be applied. As to the via hole to be made in the GaAs substrate, since GaAs is readily dissolved by any of sulfuric acid/hydrogen peroxide solution or alkali solution, wet etching using such solution as the etchant is essentially sufficient for making the via hole. However, since side etching becomes large with wet etching and it is difficult to control the shape of the via hole, reactive ion etching (RIE) or ion milling is used normally. When using RIE for making the via hole, an etching rate as high as 50 to 100 xcexcm/hr can be obtained, and the via hole can be made easily, by using a mixed gas of CCl2F2 and He as the etching gas and using a silicon oxide (SiO2) film or an organic resist film as the etching mask. Since GaAs substrates are readily processed either mechanically or chemically as mentioned above, high-frequency operation and high-power output of GaAs FETs have already been realized by thinning the substrate and making the via hole in the substrate.
However, it is difficult to employ the technique successfully used in GaAs FETs for thinning the substrate and making the via hole in the substrate also for fabrication of GaN FETs. As referred to above, sapphire substrates are often used for manufacturing GaN FETs. Sapphire, however, is much harder than GaAs, and it id extremely difficult to reduce the thickness of the sapphire substrate by using the above-explained conventional lapping technology. If it is forcibly thinned by lapping, it will large curve due to a lapping strain to be concave on the major surface side where the device should be made, and it will finally break down. Also regarding the via hole to be made in the sapphire substrate, since sapphire is very stable in chemical property, wet etching cannot be used without any effective etchant. As to dry etching by RIE, since its etching rate is as very low as several xcexcm/hr in maximum, and there is no etching mask having a selectivity acceptable for selective etching. Therefore, it is actually impossible to make the via hole with any of these methods. So, when making GaN FET on a sapphire substrate, it has been difficult to realize high-frequency operation and high-power output relying on thinning the substrate and making the via hole.
The above-made discussion applies to the case where GaN FET is made on a sapphire substrate. However, the same problem also lies in the case where GaN FET is made on a SiC substrate that is very hard and chemically stable, similarly to sapphire substrates.
On the other hand, FIG. 1 shows a conventional GaN semiconductor laser. As shown in FIG. 1, in the GaN semiconductor laser, sequentially stacked on a c-plane sapphire substrate 101 are a GaN buffer layer 102, n-type GaN contact layer 103, n-type AlGaN cladding layer 104, n-type GaN optical guide layer 105, active layer 106 with a Ga1xe2x88x92xInxN/Ga1xe2x88x92yInyN multi quantum well structure, p-type GaN optical guide layer 107, p-type AlGaN cladding layer 108 and p-type GaN contact layer 109. An upper-lying portion of the n-type GaN contact layer 103, n-type AlGaN cladding layer 104, n-type GaN optical guide layer 105, active layer 106 with the Ga1xe2x88x92xInxN/Ga1xe2x88x92yInyN multi quantum well structure, p-type GaN optical guide layer 107, p-type AlGaN cladding layer 108 and p-type GaN contact layer 109 have a mesa configuration of a predetermined width. Additionally, a p-side electrode 110 is made on the p-type GaN contact layer 109 in ohmic contact therewith, and an n-side electrode 111 is made in ohmic contact on a location of the n-type GaN contact layer 103 adjacent to the mesa portion.
However, in the conventional GaN semiconductor laser shown in FIG. 1, since the n-side electrode 111 is made on the location of the n-type GaN contact layer 103 adjacent to the mesa portion, the current supplied between the p-side electrode 110 and the n-side electrode 111 during operation must flow along the n-type GaN contact layer 103. Therefore, the current path was long, and this resulted in increasing the operation voltage. Moreover, Since the GaN semiconductor laser has a structure locating both the p-side electrode 110 and the n-side electrode 111 on the bottom surface of the substrate, it was impossible to use an apparatus used for assembling GaAs semiconductor lasers having the p-side electrode on the top surface of the substrate and the n-side electrode on the bottom surface of the substrate. Therefore, the GaN semiconductor laser required a special assembling apparatus, and this invited an increase of the manufacturing cost.
It is therefore an object of the invention to provide a semiconductor device which can be improved for high-frequency operation and/or high-power output by the use of a thinned substrate and/or a via hole in the substrate even when a device using nitride III-V compound semiconductors is made on a single-crystal substrate such as sapphire substrate or SiC substrate, which is hard and chemically stable, and to provide a manufacturing method capable of easily manufacturing such a semiconductor device.
Another object of the invention is to provide a semiconductor device reduced in operation voltage of a light emitting element and decreased in manufacturing cost by the use of a via hole in its substrate when the light emitting element is made by using nitride III-V compound semiconductors on a non-conductive single-crystal substrate such as sapphire substrate, and to provide a manufacturing capable of easily manufacturing such a semiconductor device.
The Inventor made researches, summarized below, toward overcoming the above-indicated problems involved in the conventional techniques.
For thinning a sapphire substrate already having formed a device using GaN semiconductors, there are some problems to solve. One of the problems is to thin the substrate sufficiently, namely to a thickness around 100 xcexcm, for example, decades of xcexcm, in the process of thinning the sapphire substrate by using lapping or other method, without damaging the device on the surface of the substrate, while minimizing the processing strain and preventing warpage or breakage of the substrate when using a sapphire substrate, unlike the case using a GaAs substrate, warpage causes difficulties in subsequent processes unless substantially all of the strain in the thinned substrate is removed finally. Another problem is to find out an optimum processing method for making the via hole in any desired location of the sapphire substrate. Use of molten coral sand around 900xc2x0 C. and use of molten phosphoric acid around 400xc2x0 C. are known as methods for wet etching of sapphire. The Inventor made reviews to estimate applicability of these methods as a technique for making the via hole in a sapphire substrate and also to find out possible materials usable as an etching mask in the technique. The Inventor further made researches to find out a new simple method for making the via hole without using the etching mask.
When a substrate of a hard material such as sapphire substrate is used, diamond powder is a sole granular abrasive material acceptable for use in lapping. In general, thickness of the layer changed in quality or strained by lapping processing approximately amounts several times the grain size of the abrasive grains used there. Therefore, if the substrate should be thinned to a thickness around 20 nm, for example, since the thickness of the sapphire substrate before being thinned is usually about 400 xcexcm, for thinning it, it is first processes by lapping, using an abrasive liquid containing diamond granular abrasive material with the grain size of 30 xcexcm, for example. In this case, if it is further thinned, then the ratio of the strained layer relative to the remainder substrate will increase, and a large strain will invite warpage or breakage of the substrate. Then, by using a diamond granular abrasive material with a smaller grain size as large as 10 xcexcm, for example, it is processed by lapping to a thickness around 100 xcexcm, for example. As a result, the strained layer made by the preceding lapping can be removed. However, another strained layer of a thickness of decades of xcexcm newly appears. Therefore, by next using an abrasive liquid containing a granular abrasive material with a grain size around 1 xcexcm, for example, it is processed by lapping or polishing to a thickness around 40 xcexcm.
In case of GaAs substrates, the strained layer produced by lapping has been fully removed conventionally by mechanical-chemical polishing. More specifically, it has been known that the strained layer can be removed completely by polishing the substrate in hypochlorous acid solution containing micro soft grains. However, As to sapphire substrates, no polishing in such solution has been known. Then, consideration is made on using the following method. That is, an appropriate amount of sulfuiric acid is added to phosphoric acid, and the temperature is held at 280xc2x0 C. This liquid has an etching rate around 10 xcexcm/hr for sapphire. High-temperature phosphoric acid has been known to have an etching function of sapphire (for example, (5) Ceramics Processing Handbook, Kensetsu Sangyo Chosakai (1987)). However, direct exposure of a device to such a high-temperature corrosive solution invites characteristic deterioration of the device and wiring. Therefore, there is the need for a countermeasure to ensure that phosphoric acid never touches the device side. For this purpose, a first effective measure is to bring only the bottom surface into contact with the liquid, and a second effective measure is to make a protective film on the device side. Effective as the protective film are a SiO2 film made by CVD, oxide or nitride film such as SiN film having a resistance to phosphoric acid, and heat-resistant polyimide film, for example.
For making the via hole, dry etching such as conventional RIE cannot be employed. Then, consideration is made on using the following method. That is, as shown in FIG. 2, for example, after growing a GaN semiconductor layer 2 with a thickness of several xcexcm in total, for example, on the surface of a sapphire substrate 1, and a GaN FET 3 is formed on the GaN semiconductor layer 2. After that, a metal wiring and a pad for the GaN FET 3 are made. Reference numeral 4 denotes a Au pad electrically connected to the source of the GaN FET 3. Thereafter, an inter-layer insulating film 5 such as SiO2 film is formed on the GaN semiconductor layer 2 to cover the Au pad 4. Subsequently, the sapphire substrate 1 is thinned to a thickness of 100 xcexcm or less, for example to a thickness around decades of xcexcm. After that, the bottom surface of the sapphire substrate 1 is covered locally at the location for the via hole by a multi-layered etching mask 6 made by stacking metal thin films. Used as the multi-layered film is, for example, a two-layered film stacking a thin film of a metal resistant to phosphoric acid, such as Pt, Au, Pd, or the like, on a thin film of a metal well adhesive to the sapphire substrate, such as Ni, Cr, Ti, or the like. On the other hand, a protective film of polyimide, for example, is formed on the surface of the inter-layer insulating film 5. Thereafter, the bottom surface side of the sapphire substrate 1 is immersed into an etchant of phosphoric/sulfuric acid solution held at approximately 280xc2x0 C., for example, to etch it. In this case, since the etching rate is approximately 10 xcexcm/hr, the etching time is adjusted depending upon the thickness of the sapphire substrate 1. In this manner, as shown in FIG. 3, the via hole 8 is made in the sapphire substrate 1. Then, next using RIE, part of the GaN semiconductor layer 2 exposed at the bottom of the via hole 8 is removed by etching to expose the Au pad 4 there. In the process of etching the GaN semiconductor layer 2, if Cl2 gas is used as the etching gas, since the etching rate is 5 to 10 xcexcm/hr and the ratio of the etching rate for Au is approximately 3 or more, a sufficient thickness of the Au pad 4 can be maintained even after etching the GaN semiconductor layer to a slightly over-etching level, if the Au pad 4 originally has a thickness around 1 xcexcm or more. It may occur that the etching mask 6 on the bottom surface of the sapphire substrate 1 is removed while the GaN semiconductor layer 2 is etched by RIE. However, it is immaterial.
After that, a metal film thicker than the sapphire substrate 1 is formed on the bottom surface of the sapphire substrate 1 to contact with the Au pad through the via hole 8. When making the metal film, after stacking, in sequence, Ni or Cr and Au on the bottom surface of the sapphire substrate 1 by vacuum evaporation, for example, a Au film with a sufficient thickness, for example, from decades of xcexcm to hundreds of xcexcm, is deposited on the metal layers by plating, for example. The thin, plate-like metal film made in this manner makes electric connection with the source of the GaN FET 3 and functions to radiate heat.
On the other hand, as an alternative method for making the via hole in the sapphire substrate, there is a method using a pulse laser beam. That is, sapphire absorbs infrared rays with wavelengths longer than approximately 6 xcexcm. Taking it into account, by irradiating a pulse laser beam from a CO2 laser with the wavelength of 10.6 xcexcm, for example, to the sapphire substrate, it is locally heated to a very high temperature to cause ablation of sapphire. This is a technique brought into practical use for scribing alumina substrates. More specifically, by irradiating a single pulse of laser beam with the peak output of 300 W, pulse width of 200 xcexcs, and beam diameter of approximately 100 xcexcm, for example, a hole of a depth around 200 xcexcm can be made in the alumina substrate. Therefore, as shown in FIG. 4, for example, after making a hole with a depth around 50 xcexcm, for example, by irradiating a pulse laser beam 9 from a CO2 laser to a desired location on the bottom surface of the sapphire substrate 1 with a thickness around 200 xcexcm, by uniformly etching the location to the depth of about 150 xcexcm, for example, using an etchant of phosphoric acid/sulfuric acid solution heated to a high temperature, the via hole 8 as shown in FIG. 5 can be made. This method is a maskless process, and therefore needs much less steps.
Here again explained are merits of thinning sapphire substrates. As shown in FIG. 6, thermal conductivity of sapphire is as small as approximately 0.4 W/cmK at the room temperature and has a large negative gradient relative to temperature, that is, it becomes lower as the temperature rises. In the case where a device using GaN semiconductors on a sapphire substrate, heat from the device during operation moves to the sapphire substrate due to heat conduction. In case of a high-power device, heat is radiated through a heat sink typically made on the bottom surface of the substrate. However, the fact that heat conductivity of sapphire decreases with increase of temperature means that heat radiation becomes difficult as the temperature rises. Therefore, from the viewpoint of heat radiation, it is advantageous that the sapphire substrate supporting the device is as thin as possible, and it is preferable to thin the substrate to the limit within a range acceptable for mechanical strength. By thinning in this level, efficient heat radiation is ensured, and the increase in temperature can be alleviated.
The above-made discussion applies to the case where a sapphire substrate is used. However, it is also applicable to the case where other single-crystal substrates like SiC substrate, for example, are used.
On the other hand, when first making GaN semiconductor layers forming a GaN light emitting device on a non-conductive single-crystal substrate such as sapphire substrate, for example, next making a via hole in the single-crystal substrate from its bottom surface in the same manner as explained above to expose the lower surface of the GaN semiconductor layer, thereafter making one of the electrodes on the bottom side of the single-crystal substrate to be in contact with the GaN semiconductor layer from the lower side through the via hole, and making the other electrode on the GaN semiconductor layer to be in positional alignment with the via hole, the length of the current path supplied between the electrodes during operation is reduced to a value substantially equal to the thickness of the GaN semiconductor layer, which is much shorter than the length of the current path in a conventional device.
The Invention has been made taking these researches by the Inventor into account.
That is, according to the first aspect of the invention, there is provided a manufacturing method of a semiconductor device, comprising the steps of:
making a device using nitride III-V compound semiconductors on one major surface of a single-crystal substrate made of a material different from nitride III-V compound semiconductors;
thinning the single-crystal substrate by processing the other major surface of the single-crystal substrate by lapping using an abrasive liquid containing an abrasive material of diamond abrasive grains and reducing the grain size of the abrasive material in plural steps; and
removing a strained layer produced on the other major surface of the single-crystal substrate during the lapping by etching the other major surface of the single-crystal substrate after lapping by using an etchant containing phosphoric acid or phosphoric acid and sulfuric acid as its major component and heated to 150 through 450xc2x0 C.
In the first aspect of the invention, the single-crystal substrate is thinned typically by lapping to a thickness not larger than 100 xcexcm, or a thickness not larger than decades of xcexcm. In order to prevent any damage to the device upon etching for removing a strained layer by lapping, the surface of the device made on one major surface of the single-crystal substrate is preferably covered by a protective film having a resistance to the etchant prior to the etching. Usable as the protective film are, for example, a silicon oxide (SiO2) film, silicon nitride (SiN) film , or polyimide film. During the etching, it is preferable to immerse only the other major surface of the single-crystal substrate into the etchant.
According to the second aspect of the invention, there is provided a semiconductor device having a single-crystal substrate made of a material different from nitride III-V compound semiconductors, and a device made on one major surface of the single-crystal substrate by using III-V compound semiconductors, comprising:
electrical connection to the device being made through a via hole formed in the single-crystal substrate.
According to the third aspect of the invention, there is provided a manufacturing method of a semiconductor device having a single-crystal substrate made of a material different from nitride III-V compound semiconductors and a device made on one major surface of the single-crystal substrate by using III-V compound semiconductors, in which electrical connection to the device is made through a via hole formed in the single-crystal substrate, comprising the step of:
forming the via hole by selectively etching the other major surface of the single-crystal substrate by using an etchant containing as its major component phosphoric acid or phosphoric acid and sulfuric acid heated to 150 through 450xc2x0 C.
In the third aspect of the invention, an etching mask made of a first thin film of Cr, Ti or Ni and a second thin film of Pt, Pd or Au thereon is made on the other major surface of the single-crystal substrate, and the via hole is made by etching the single-crystal substrate, using the etching mask. During the etching, it is preferable to immerse only the other major surface of the single-crystal substrate into the etchant.
According to the fourth aspect of the invention, there is provided a manufacturing method of a semiconductor device having a single-crystal substrate made of a material different from nitride III-V compound semiconductors and a device made on one major surface of the single-crystal substrate by using III-V compound semiconductors, in which electrical connection to the device is made through a via hole formed in the single-crystal substrate, comprising the steps of:
making a hole as deep as 10 xcexcm or more but not reaching one major surface of the substrate by selectively irradiating laser light having a wavelength not shorter than 6 xcexcm onto the other major surface of the single-crystal substrate; and
making the via hole by etching the other major surface of the single-crystal substrate by using an etchant containing as its major component phosphoric acid or phosphoric acid and sulfuric acid heated to 150 through 450xc2x0 C. so as to make the hole reach the one major surface.
In the fourth aspect of the invention, pulse laser light having the wavelength of 10.6 xcexcm from a CO2 laser, for example, is used as the laser light.
In the present invention, any appropriate shape of the via hole in the single-crystal substrate can be selected where necessary. For example, it may be circular or rectangular (including those extending long in form of a slit). The via hole may be one per one device, or a plurality of such via holes may be made in one device. When providing a plurality of via holes, they are aligned in a single row, a plurality of rows, or may be arranged variously.
In the invention, the single-crystal substrate is a sapphire substrate, spinel substrate, perovskite yttrium alminate (YAP) substrate or SiC substrate, for example.
In the present invention, each nitride III-V compound semiconductor includes at least Ga and N, and may additionally include one or more group III elements selected from the group consisting of Al, In and B and/or one ore more group V elements selected from the group consisting of As and P. Some specific examples of nitride III-V compound semiconductors are GaN, AlGaN, GaInN and AlGaInN.
In the present invention, the semiconductor device may be an electron transport device such as field effect transistor (FET), or a light emitting device such as semiconductor laser or light emitting diode.
According to the first aspect of the invention having the above-summarized construction, since the single-crystal substrate is thinned by lapping of the other major surface of the single-crystal substrate while reducing the grain size of the abrasive material in some steps, the single-crystal substrate can be thinned to a desired thickness without inviting warpage or breakage even if the single-crystal substrate is extremely hard such as sapphire substrate or SiC substrate, while minimizing a strained layer caused by lapping. Then, by etching the other major surface of the thinned single-crystal substrate by using an etchant containing as its major component phosphoric acid of phosphoric acid and sulfuric acid heated to 150 through 450xc2x0 C., the strained layer produced on the other major surface of the single-crystal substrate during lapping can be removed.
According to the second aspect of the invention having the above-summarized construction, since electrical connection to the device is made through the via hole made in the single-crystal substrate, if the device is FET, the source inductance can be reduced. When a light emitting device using nitride III-V compound semiconductors is made on a non-conductive single-crystal substrate, by making the via hole from the bottom of the single substrate in alignment with one of electrodes made on the nitride III-V compound semiconductors, and bringing the other electrode into contact with the lower surface of the nitride III-V compound semiconductor layer through the via hole to make electric connection of the other electrode with the light emitting device, the path of a current flowing between these electrodes during operation can be reduced to a much shorter length substantially equal to the thickness of the nitride III-V compound semiconductor layers.
According to the third aspect of the invention having the above-summarized construction, since the via hole is made by selectively etching the other major surface of the single-crystal substrate by using an etchant containing as its major component phosphoric acid or phosphoric acid and sulfuric acid heated to 150 through 450xc2x0 C., the via hole can be made easily in any desired location of the single-crystal substrate.
According to the fourth aspect of the invention having the above-summarized construction, by selectively irradiating laser light having a wavelength of 6 xcexcm or more onto the other major surface of the single-crystal substrate to make a hole as deep as 10 xcexcm and not reaching one major surface, and thereafter etching the other major surface of the single-crystal substrate by using an etchant containing as its major component phosphoric acid or phosphoric acid and sulfuric acid heated to 150 through 450xc2x0 C. to make the hole reach one major surface of the substrate, the via hole can be made easily by a maskless process in any desired location of the single-crystal substrate.
The above, and other, objects, features and advantage of the present invention will become readily apparent from the following detailed description thereof which is to be read in connection with the accompanying drawings.